Integrating AI in VLSI: The Next Revolution in Chip Design

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The Department of Electronics Engineering (VLSI Design and Technology) is organizing a lecture on “Integrating AI in VLSI: The Next Revolution in Chip Design” on 23rd August 2025.
Our distinguished speaker, Mr. Dinesh Patil, Senior Director of R&D at Synopsys Inc., Bangalore, will delve into the transformative impact of Artificial Intelligence on VLSI technology. This session will highlight how AI-driven design methodologies are reshaping modern chip architecture, enabling smarter, faster, and more efficient semiconductor solutions.